The company (Synthezza) founder Prof. Baranov is an industry visionary who has been developing Synthagate technology and solutions for many years of his fruitful work. He published fifteen books, over 80 papers, and has extensive experience in research and development in the industry and academia.

Our international development team of 12 people has advanced university degrees and a very strong background in HLS. Six experts have been working on the technology for about 10 years. The team works in Israel, Canada, Russia, Estonia and Poland. The team designed a powerful prototype and now has been working to transfer the technology to commercial products (EDA tools).

Synthezza High Level and RTL Design


Synthagate—HLS & RTL

     Synthagate Overview

     What makes Synthagate different

Logic Synthesizer



Algorithmic State machines in HLS

     What is Algorithmic State Machine?

     Time in ASM

     ASM in GUI, System C and VHDL

     ASM Transformations

          Asm Combining

          Asm Minimization

          SubAsm Inclusion

High Level Synthesis

     How Does Synthagate Work

     ASM Creator Short Manual

Synthesis at Register Transfer Level (RTL)

     Data Path

     Control Unit

     Top Design

ASM Creator Manual

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Benchmarks of High Level Synthesis

Benchmarks of FSMs and Logic Circuits

     FSM Benchmarks

     Logic Circuits



105 Designs at High Level and RTL

Logic Designs

     Logic Circuits





     About Us

     Contact US


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Synthagate HLS & RTL