Design Technology | High Level Synthesis | ASM Creator Manual (Short)

ASM Creator Manual

ASM Creator

Draw Algorithmic State Machines (ASMs) and build them to a connectivity list

Figure 1. ASM of instruction Coder

ASM Creator is a part of the EDA tool Synthagate for High level and Logic synthesis of digital systems. With ASM Creator it is possible to draw the Algorithmic State Machine (ASM) and build it to connectivity list. An example of ASM Coder is presented in Fig. 1 (see details about this example on the page “How does Synthagate work”).

The graph of ASM (hereinafter referred to as ASM) consists of a number of interconnected vertices. Any ASM begins with vertex “Begin”, which is followed by a combination of conditional and operator vertices, and terminates with a vertex “End”. We can also use special “Comment“ vertices, which are not part of the algorithm, but can be added for explanations. To place a vertex, select it from the pane on the left and drag-and-drop it to the desired location. It will align to the grid automatically.


To make a connection, press “Connector” button. The red dots will appear at the outputs of vertices which are not connected yet. Choose the output of the source vertex and connect it by the left button of the mouse with the input of the target vertex. If the input of the target vertex is already connected with the output of another vertex we can connect the source with the arc entering to the input of the target vertex (output of vertex “dmacycle” is connected with the arc between operator vertex and vertex “End”.


Every vertex has a fixed number of available connections. Vertex “Begin” has only one output, while vertex “End” – only one input. An operator vertex has one input and one output, a conditional vertex has one input and two outputs, marked by symbols “0” and “1”. Each output can be connected with only one input whereas each input should be connected at least with one output.


Note, that the first output of the “Condition” vertex is automatically considered an output “0”. Double-click at the arrow to change the value of the condition for the path.


ASM Creator provides fast possibilities for changing the visual appearance of ASM. The formatting can be applied to an individual element by simply selecting it, or to a group of elements. The desired fragment of ASM is selected either by drawing a rectangle around it with a mouse, or by clicking individual elements while holding the “Ctrl” key down. Any vertex or connection arrow can have a unique line width, line pattern, line and fill colour. It is possible to select the font size, style, alignment and colour of any object of ASM. To choose these parameters, you should apply to “Tools – Options” from the drop-down menu.


Any selected element or a group of elements of ASM can be freely moved around. However, in order to maintain connection, arrows, which link the selected part to the rest of ASM, should not be selected.


When ready, the ASM can be saved as an “ASM_name.asd” file for subsequent viewing, editing or printing with ASM Creator. ASM Creator allows open multiple “.asd” files at the same time. To switch between the opened files, click the corresponding filename in the pane just above the workspace. In order to close a file, select it and press the button with a white cross in a red rectangle or select “Close” command from the “File” drop-down menu.


ASM Creator allows to construct a hierarchy of algorithms. Any vertex with generalized operator can be linked to another “.asd” file, which contains a sub-algorithm. An example ASM of the generalized operator PackData is presented in Fig. 2. In order to link it to a “PackData” vertex of ASM Coder from Fig. 1, the sub-algorithm should be saved with the exactly same name (“PackData.asd”). It does not really matter in which folder this file is situated, as ASM Creator would search the whole computer, if necessary, to find it.

To open ASM of the linked sub-algorithm, right-click the corresponding generalized operator and select “Open” command. If there is none, an empty workspace will be opened.

Figure 2. Generalized Operator PackData

ASM can be  built to get a connectivity list by pressing the “Build“ button in the toolbar or by selecting the “Build“ command from “Build“ drop-down menu. Each line of the resultant connectivity list (“ASM_name.gsa”) corresponds to a vertice in ASM, which is numbered and provided with a list of subsequent vertices. File “ASM_name.mic” provides the list of operators (capital Y-s) together with micro operations (small y-s). File “ASM_name.txt” provides the encoding legend for operators, micro operations and logical conditions.


Example of ASM with different arithmetic and comparison operators is presented in Fig. 3.

Figure 3. Example of ASM with different arithmetic and comparison operators

Arithmetic and comparison operators are presented in Tables 1 and 2. 

Table 2. Comparison operators

Table 1. Arithmetic operators

Assignment and shift operators


r1:=r2 – The length of vectors should be equal

r1:=”1011” – assignment of binary constant to four bit vector r1

r1:=x”1011” – assignment of hexadecimal constant to sixteen bit vector r1

r1:=0 – reset of r1 (after that each bit of r1 is equal to 0)

r1:=1 – preset of r1 (after that each bit of r1 is equal to 1)

p:=p+1 – p is a counter. Increment counter by one

p:=p-1 – p is a counter. Decrement counter by one

r2:=r2<<n is n-bit logical shift to the left of r2

r2:=r2>>n is n-bit logical shift to the right of r2


Arrays in ASM Creator


To apply to the part of array you should use the round brackets. A microoperation in operator  vertix


a1 := b2(7-4)


means that the bits from 7 downto 4 of the output of unit b2 will be assign to the input of unit a1 having only 4 bits. More examples:


a3(5-4) := c5(15-14);

r1(0-7) := r2(63-56).

ASM Creator

ASM Creator

Draw Algorithmic State Machines (ASMs) and connect them to a connectivity list


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Synthagate—HLS & RTL

     Synthagate Overview

     What makes Synthagate different

     Examples of High Level and RTL Design

          Synthesis From GUI

          Synthesis From SystemC

          Synthesis From VHDL

Logic Synthesizer

     Logic Synthesizer Experiments



Algorithmic State machines in HLS

     What is Algorithmic State Machine?

     Time in ASM

     ASM in GUI, System C and VHDL

     ASM Transformations

          Asm Combining

          Asm Minimization

          SubAsm Inclusion

High Level Synthesis

     How Does Synthagate Work

     ASM Creator Short Manual

Synthesis at Register Transfer Level (RTL)

     Data Path

     Control Unit

     Top Design






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