Books | Robot_Books | Fig_17
library IEEE;
use IEEE.std_logic_1164.all;
-----------------------------------------------
entity top is
port
(
clk : in std_logic;
compecho : in std_logic;
comptrig : out std_logic;
ds_echo : in std_logic;
dstrig : out std_logic;
idle : out std_logic;
lengctrl1 : out std_logic;
lengctrl2 : out std_logic;
pwm : out std_logic;
rengctrl1 : out std_logic;
rengctrl2 : out std_logic;
rst : in std_logic;
start : in std_logic
);
end top;
-----------------------------------------------
architecture arc_top of top is
component Structm is
port (
anglecnt_count : out std_logic;
anglecnt_reset : out std_logic;
anglediff_en : out std_logic;
clk : in std_logic;
comp12_4_dout : in std_logic;
comp12_9_dout : in std_logic;
comp16_7_dout : in std_logic;
comp16_8_dout : in std_logic;
comp20_1_dout : in std_logic;
comp20_2_dout : in std_logic;
comp20_3_dout : in std_logic;
comp20_5_dout : in std_logic;
comp20_6_dout : in std_logic;
compecho : in std_logic;
comprg1_en : out std_logic;
comprg2_en : out std_logic;
comptrig_cnt_count : out std_logic;
comptrig_cnt_reset : out std_logic;
comptrig_reset : out std_logic;
comptrig_set : out std_logic;
ctr_mux0_0 : out std_logic;
ctr_mux0_1 : out std_logic;
distrg_en : out std_logic;
ds_cnt_count : out std_logic;
ds_cnt_reset : out std_logic;
ds_echo : in std_logic;
dstrig_cnt_count : out std_logic;
dstrig_cnt_reset : out std_logic;
dstrig_reset : out std_logic;
dstrig_set : out std_logic;
idle : out std_logic;
lengctrl1_reset : out std_logic;
lengctrl1_set : out std_logic;
lengctrl2_reset : out std_logic;
lengctrl2_set : out std_logic;
pwm_cnt_count : out std_logic;
pwm_cnt_reset : out std_logic;
pwm_reset : out std_logic;
pwm_set : out std_logic;
rengctrl1_reset : out std_logic;
rengctrl1_set : out std_logic;
rengctrl2_reset : out std_logic;
rengctrl2_set : out std_logic;
rst : in std_logic;
speedrg_en : out std_logic;
start : in std_logic;
stopflag : in std_logic;
stopflag_reset : out std_logic;
stopflag_set : out std_logic
);
end component;
component dp is
port
(
-- Inputs from control unit
distrg_en : in std_logic; --(y1)
lengctrl1_set : in std_logic; --(y2)
lengctrl2_set : in std_logic; --(y3)
rengctrl1_set : in std_logic; --(y4)
rengctrl2_set : in std_logic; --(y5)
stopflag_reset : in std_logic; --(y6)
stopflag_set : in std_logic; --(y7)
speedrg_en : in std_logic; --(y8)
ctr_mux0_1 : in std_logic; --(y9)
ctr_mux0_0 : in std_logic; --(y10)
dstrig_reset : in std_logic; --(y11)
ds_cnt_reset : in std_logic; --(y12)
dstrig_set : in std_logic; --(y13)
dstrig_cnt_reset : in std_logic; --(y14)
ds_cnt_count : in std_logic; --(y15)
dstrig_cnt_count : in std_logic; --(y16)
anglediff_en : in std_logic; --(y17)
lengctrl1_reset : in std_logic; --(y18)
lengctrl2_reset : in std_logic; --(y19)
rengctrl1_reset : in std_logic; --(y20)
rengctrl2_reset : in std_logic; --(y21)
comprg2_en : in std_logic; --(y22)
comprg1_en : in std_logic; --(y23)
pwm_reset : in std_logic; --(y24)
pwm_cnt_count : in std_logic; --(y25)
pwm_set : in std_logic; --(y26)
pwm_cnt_reset : in std_logic; --(y27)
comptrig_reset : in std_logic; --(y28)
anglecnt_reset : in std_logic; --(y29)
comptrig_set : in std_logic; --(y30)
comptrig_cnt_reset : in std_logic; --(y31)
anglecnt_count : in std_logic; --(y32)
comptrig_cnt_count : in std_logic; --(y33)
-- Inputs from outside
clk : in std_logic;
rst : in std_logic;
-- Outputs to control unit
stopflag : out std_logic; --(x1)
comp20_1_dout : out std_logic; --(x3)
comp20_2_dout : out std_logic; --(x4)
comp20_3_dout : out std_logic; --(x5)
comp12_4_dout : out std_logic; --(x7)
comp20_5_dout : out std_logic; --(x8)
comp20_6_dout : out std_logic; --(x9)
comp16_7_dout : out std_logic; --(x10)
comp16_8_dout : out std_logic; --(x11)
comp12_9_dout : out std_logic; --(x13)
-- Outputs to outside
comptrig : out std_logic;
dstrig : out std_logic;
lengctrl1 : out std_logic;
lengctrl2 : out std_logic;
pwm : out std_logic;
rengctrl1 : out std_logic;
rengctrl2 : out std_logic
);
end component;
-- output of control unit
signal distrg_en : std_logic;
signal lengctrl1_set : std_logic;
signal lengctrl2_set : std_logic;
signal rengctrl1_set : std_logic;
signal rengctrl2_set : std_logic;
signal stopflag_reset : std_logic;
signal stopflag_set : std_logic;
signal speedrg_en : std_logic;
signal ctr_mux0_1 : std_logic;
signal ctr_mux0_0 : std_logic;
signal dstrig_reset : std_logic;
signal ds_cnt_reset : std_logic;
signal dstrig_set : std_logic;
signal dstrig_cnt_reset : std_logic;
signal ds_cnt_count : std_logic;
signal dstrig_cnt_count : std_logic;
signal anglediff_en : std_logic;
signal lengctrl1_reset : std_logic;
signal lengctrl2_reset : std_logic;
signal rengctrl1_reset : std_logic;
signal rengctrl2_reset : std_logic;
signal comprg2_en : std_logic;
signal comprg1_en : std_logic;
signal pwm_reset : std_logic;
signal pwm_cnt_count : std_logic;
signal pwm_set : std_logic;
signal pwm_cnt_reset : std_logic;
signal comptrig_reset : std_logic;
signal anglecnt_reset : std_logic;
signal comptrig_set : std_logic;
signal comptrig_cnt_reset : std_logic;
signal anglecnt_count : std_logic;
signal comptrig_cnt_count : std_logic;
-- output of operational unit
signal stopflag : std_logic;
signal comp20_1_dout : std_logic;
signal comp20_2_dout : std_logic;
signal comp20_3_dout : std_logic;
signal comp12_4_dout : std_logic;
signal comp20_5_dout : std_logic;
signal comp20_6_dout : std_logic;
signal comp16_7_dout : std_logic;
signal comp16_8_dout : std_logic;
signal comp12_9_dout : std_logic;
begin
u1_fsm : structm port map
(
anglecnt_count => anglecnt_count ,
anglecnt_reset => anglecnt_reset ,
anglediff_en => anglediff_en ,
clk => clk ,
comp12_4_dout => comp12_4_dout ,
comp12_9_dout => comp12_9_dout ,
comp16_7_dout => comp16_7_dout ,
comp16_8_dout => comp16_8_dout ,
comp20_1_dout => comp20_1_dout ,
comp20_2_dout => comp20_2_dout ,
comp20_3_dout => comp20_3_dout ,
comp20_5_dout => comp20_5_dout ,
comp20_6_dout => comp20_6_dout ,
compecho => compecho ,
comprg1_en => comprg1_en ,
comprg2_en => comprg2_en ,
comptrig_cnt_count => comptrig_cnt_count ,
comptrig_cnt_reset => comptrig_cnt_reset ,
comptrig_reset => comptrig_reset ,
comptrig_set => comptrig_set ,
ctr_mux0_0 => ctr_mux0_0 ,
ctr_mux0_1 => ctr_mux0_1 ,
distrg_en => distrg_en ,
ds_cnt_count => ds_cnt_count ,
ds_cnt_reset => ds_cnt_reset ,
ds_echo => ds_echo ,
dstrig_cnt_count => dstrig_cnt_count ,
dstrig_cnt_reset => dstrig_cnt_reset ,
dstrig_reset => dstrig_reset ,
dstrig_set => dstrig_set ,
idle => idle ,
lengctrl1_reset => lengctrl1_reset ,
lengctrl1_set => lengctrl1_set ,
lengctrl2_reset => lengctrl2_reset ,
lengctrl2_set => lengctrl2_set ,
pwm_cnt_count => pwm_cnt_count ,
pwm_cnt_reset => pwm_cnt_reset ,
pwm_reset => pwm_reset ,
pwm_set => pwm_set ,
rengctrl1_reset => rengctrl1_reset ,
rengctrl1_set => rengctrl1_set ,
rengctrl2_reset => rengctrl2_reset ,
rengctrl2_set => rengctrl2_set ,
rst => rst ,
speedrg_en => speedrg_en ,
start => start ,
stopflag => stopflag ,
stopflag_reset => stopflag_reset ,
stopflag_set => stopflag_set
);
u2_dp : dp port map
(
clk => clk ,
rst => rst ,
distrg_en => distrg_en ,
lengctrl1_set => lengctrl1_set ,
lengctrl2_set => lengctrl2_set ,
rengctrl1_set => rengctrl1_set ,
rengctrl2_set => rengctrl2_set ,
stopflag_reset => stopflag_reset ,
stopflag_set => stopflag_set ,
speedrg_en => speedrg_en ,
ctr_mux0_1 => ctr_mux0_1 ,
ctr_mux0_0 => ctr_mux0_0 ,
dstrig_reset => dstrig_reset ,
ds_cnt_reset => ds_cnt_reset ,
dstrig_set => dstrig_set ,
dstrig_cnt_reset => dstrig_cnt_reset ,
ds_cnt_count => ds_cnt_count ,
dstrig_cnt_count => dstrig_cnt_count ,
anglediff_en => anglediff_en ,
lengctrl1_reset => lengctrl1_reset ,
lengctrl2_reset => lengctrl2_reset ,
rengctrl1_reset => rengctrl1_reset ,
rengctrl2_reset => rengctrl2_reset ,
comprg2_en => comprg2_en ,
comprg1_en => comprg1_en ,
pwm_reset => pwm_reset ,
pwm_cnt_count => pwm_cnt_count ,
pwm_set => pwm_set ,
pwm_cnt_reset => pwm_cnt_reset ,
comptrig_reset => comptrig_reset ,
anglecnt_reset => anglecnt_reset ,
comptrig_set => comptrig_set ,
comptrig_cnt_reset => comptrig_cnt_reset ,
anglecnt_count => anglecnt_count ,
comptrig_cnt_count => comptrig_cnt_count ,
comptrig => comptrig ,
dstrig => dstrig ,
lengctrl1 => lengctrl1 ,
lengctrl2 => lengctrl2 ,
pwm => pwm ,
rengctrl1 => rengctrl1 ,
rengctrl2 => rengctrl2 ,
stopflag => stopflag ,
comp20_1_dout => comp20_1_dout ,
comp20_2_dout => comp20_2_dout ,
comp20_3_dout => comp20_3_dout ,
comp12_4_dout => comp12_4_dout ,
comp20_5_dout => comp20_5_dout ,
comp20_6_dout => comp20_6_dout ,
comp16_7_dout => comp16_7_dout ,
comp16_8_dout => comp16_8_dout ,
comp12_9_dout => comp12_9_dout
);
end arc_top;
-----------------------------------
configuration cfg_top of top is
for arc_top
end for;
end cfg_top;
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