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Demo 4: Logic Design for FPGA Technology

Updated: Jul 15, 2020


Download Demo 4 Extended Transcript.pdf

Demo 4 Overview


This week, we decided to change the planned sequence of our posts. In this Video 4, I will talk about how Synthagate designs Finite State Machines and Logic circuits for FPGA technology. We will construct benchmarks from five groups – Small, Medium, Large, Huge, and SuperHuge. You can download these benchmarks and Synthagate results below.

Synthezza Challenge - Do you accept?

Synthezza challenges any company or university to design all of the FSMs in groups Huge and SuperHuge within the next month. Even if your result is 5% worse than Synthagate, Synthezza will give FSM synthesis algorithms and programs to the successful party.

Demo 4 Examples


To download the benchmarks, please login/sign-up to access FSM benchmarks and Logic circuit benchmarks.


To read the introduction to the demo video series, visit Demo Series Intro. To download ASM creator, visit ASM Creator.

Note: Unfortunately, we are about a week away from launching the beta version of Synthagate due to technical reasons. You will be able to download and try it for free in mid-July. If you have any ideas, suggestions or comments we would be delighted to hear from you at info@synthezza.com. Please subscribe below to be the first to get notified of new presentations and course details.

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