Demo 2: Complex HLS & RTL Designs - Titled SuperNonsense & Washroom

Download Demo 2 Extended Transcript.pdf Demo 2 Overview In Demo 2 I will discuss two designs titled SuperNonsense and Washroom. To test the ability of Synthagate to automatically design very complex digital systems, I've gathered very different modes (operations) from various designs – robots, controllers, processors, communication devices, games etc. in one heap. As it is not common to implement such a wide variety of applications in one design, I’ve called this design SuperNonsense. In fact, it is a very complex project with 129 ports, 150 signals and 11 variables. It contains ASMs of 32 modes and 140 subASMs with a total of 172 ASMs. But as we’ve covered in the previous Demo, the designer doesn’t need to construct complex ASMs. The average number of vertices in one ASM in this project is only 9.53. Since each ASM contains vertex Begin and vertex End, thus 9.53 – 2, and only 7.53 vertices left. And the designer doesn’t need to think about the minimization of this vast collection of ASMs. In about 35 sec Synthagate constructs this project at the High Level (in one file) and at the Register Transfer Level (in 79 files). The whole design, containing the detailed documentation of each step, has about 1600 files. And at the beginning we only had Algorithmic State Machines, and nothing else. No VHDL, no Verilog or anything else. The second design example you will see is Washroom. This is a light-hearted design joke of virtual robot that goes to the washroom.

Demo 2 Examples To download the examples, please login/sign-up.



To read the introduction to the demo video series, visit Demo Series Intro. To download ASM creator, visit ASM Creator. Note: The beta version of Synthagate will be available on our site at the end of June. You will be able to download and try it for free. If you have any ideas, suggestions or comments we would be delighted to hear from you at Please subscribe below to be the first to get notified of new presentations and course details. < Demo 1

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