Demo 1: HLS & RTL Codec Design in Under 5 Seconds

Updated: Jun 16


Download Demo 1 Extended Transcript.pdf,


Demo 1 Overview


This demo is intended for hardware designers of robots, controllers, processors, IoT and AI systems, video and voice processing systems, digital systems for automated and autonomous cars, etc. The demo may also be useful to university professors and college instructors that teach courses such as Digital system design, Systems on the chips, VLSI system design, Embedded systems, Computer system architecture, etc. Synthagate can also be used by engineers making the first steps in digital system design. In Demo 1: HLS & RTL Codec Design In Under 5 Seconds you will get acquainted with the new tool Synthagate for automatic design of digital systems at the High (HLS) and Register transfer level (RTL). You will learn that:


  • Synthagate works with Algorithmic State Machines (ASMs) at all design stages. 

  • Designers can construct ASM with Synthagate GUI ASM Creator or present ASM as a text in System C or VHDL. 

  • Synthagate implements various transformations of ASMs, such as ASM minimization, ASM combining, ASM inclusion etc. 

  • The designer doesn’t need to think about the optimization of the initial description of the digital system. Synthagate implements that automatically at the High level. 

  •  Synthagate automatically optimizes the initial description of digital systems at the High level. 

  • To implement High level synthesis of digital systems, the designer does not have to define each port and signal. Synthagate automatically constructs all functional and structural specifications.


By the end of this demo you will understand that Synthagate covers most digital systems designs from DSP to Processing Units.


Demo 1 Examples


To download the examples, please login/sign-up.

  1. CodecAlteraGUI

  2. CodecAlteraCPP

  3. CodecAlteraVHD


To read the introduction to the demo video series, visit Demo Series Intro.

To download ASM creator, visit ASM Creator.


Note: The beta version of Synthagate will be available on our site at the end of June. You will be able to download and try it for free. If you have any ideas, suggestions or comments we would be delighted to hear from you at info@synthezza.com. Please subscribe below to be the first to get notified of new presentations and course details.


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PRODUCTS

Synthagate—HLS & RTL

     Synthagate Overview

     What makes Synthagate different

     Examples of High Level and RTL Design

          Synthesis From GUI

          Synthesis From SystemC

          Synthesis From VHDL

Logic Synthesizer

     Overview
     Logic Synthesizer Experiments

     Benchmarks

DESIGN TECHNOLOGY

Algorithmic State machines in HLS

     What is Algorithmic State Machine?

     Time in ASM

     ASM in GUI, System C and VHDL

     ASM Transformations

          Asm Combining

          Asm Minimization

          SubAsm Inclusion

High Level Synthesis

     How Does Synthagate Work

     ASM Creator Short Manual

Synthesis at Register Transfer Level (RTL)

     Data Path

     Control Unit

     Top Design

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DEMO SERIES

  

COMPANY

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